An adder half or full adder is a digital circuit that performs addition of digital numbers. In digital computers and other kinds of processors adders are mainly used in the arithmetic logic units or ALU. They are also utilized in other parts of the processor, where they are used to calculate addresses, table index, and increment and decrement operators in memories, and similar operations with respect to CPU design. Much type of adders i.e. although adders can be constructed for many number representations, such as binary-coded decimal or excess-3, the most common adders operates on binary numbers. In cases where two's complement or ones' complement is being used to represent negative numbers, it is trivial to modify an adder into an adder– subtractor. Other signed number representations require more logic around the basic adder. A method proposed later than this study is to design carry look ahead adders using SCMOS technology, also analyze the effect of various parameters on the characteristics of adders, using 300 nm or 50 nm, spice model for CMOS technology.

Author Name: Farhan Siddiqui, Ayoush Johari

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Keywords: Adders, half adders, full adders, CLA circuits, computer architecture.

ISSN: 2394-9007

EISSN: 0000-0000

EOI/DOI: Volume-V, Number-III, April 20

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