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IJIRAE:: Design and Simulation of 2–Bit Comparator Using SET Based Logic Circuits

Single electron devices have ultra-low power consumption and high integration density which makes them promising candidates as basic circuit elements for the next generation ultra-dense VLSI and ULSI circuits. In this paper, design, simulation and analysis of 2-bit comparator using single-electron tunnelling technology based logic circuit is presented. The logic operation of the circuit was simulated and stability analysis was carried out for various temperatures using SIMON software.



Real Time Impact Factor: Pending

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Keywords: Comparator, SET, tunnel junction, CMOS, SIMON, stability

ISSN: 2349-2163

EISSN: 2349-2163


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